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GCC QUESTIONS

Understanding gcc behaviour regarding AAPCS (on STM32)
Understanding gcc behaviour regarding AAPCS (on STM32)
With these it helps You can't just open an inline assembly block and assume that r0 and r1 still contain the function arguments. There is no guarantee for that whatsoever. If you need to use the arguments you need to pass them properly as input and o
TAG : gcc
Date : January 02 2021, 06:48 AM , By : Naveen
My compiled GNU GCC 9 in Solaris 10 SPARC is not working
My compiled GNU GCC 9 in Solaris 10 SPARC is not working
Any of those help cc1 (the compiler proper executable) depends on the dynamic libmpc.so.3 library. See
TAG : gcc
Date : January 02 2021, 06:48 AM , By : Moe Skeeto
What does this backslash do in this assembly code?
What does this backslash do in this assembly code?
Does that help Inside a GAS .macro, you use \foo to refer to a macro parameter called foo.The .macro you're looking at has 3 args with default values; presumably in some use-case they want to get alternate values saved in place of what's actually in
TAG : gcc
Date : January 02 2021, 06:48 AM , By : Funkwarrior
How to manually add debug type information to a GNU GAS assembly "array" symbol?
How to manually add debug type information to a GNU GAS assembly "array" symbol?
Any of those help I am no DWARF expert either, but poking around with dwarfdump reveals enough to answer the question.
TAG : gcc
Date : January 02 2021, 06:48 AM , By : chad
Where is __builtin_va_start defined?
Where is __builtin_va_start defined?
hope this fix your issue That __builtin_va_start is not defined anywhere. It is a GCC compiler builtin (a bit like sizeof is a compile-time operator). It is an implementation detail related to the standard header (provided by the compiler, not the C
TAG : gcc
Date : January 02 2021, 06:48 AM , By : Oli
How to make GCC enforce pure/const attribute?
How to make GCC enforce pure/const attribute?
I hope this helps . GCC manual says that __attribute__((const)) is used by the programmer to indicate the behavior of the function so that it can be optimized better.
TAG : gcc
Date : January 02 2021, 06:48 AM , By : user182548
error: operand must be a register in range [d0, d15]
error: operand must be a register in range [d0, d15]
wish helps you For vector-scalar multiplications, the 32bit scalar container must be d0 - d15 by definition. (It's d0 - d7 for 16bit scalars)It's a physical limitation, and the VTBL instructions behave similarly.
TAG : gcc
Date : January 02 2021, 06:48 AM , By : user187383
How to link libs once only in GCC?
How to link libs once only in GCC?
This might help you Pardon my question, I am a beginner to GCC. I have a framework project that holds source code for multiple subcomponents. , Object files (.o) are created by compilation commands, e.g.
TAG : gcc
Date : January 02 2021, 06:48 AM , By : Doc Immortal
Can you explain why gcc -S output something like assemble?
Can you explain why gcc -S output something like assemble?
like below fixes the issue A good explanation of the compiling and linking concepts is here.Also, see this SO thread (difference between compiling and linking).
TAG : gcc
Date : January 02 2021, 06:48 AM , By : user98832
What is the use of "push %ebp; movl %esp, %ebp" generated by GCC for x86?
What is the use of "push %ebp; movl %esp, %ebp" generated by GCC for x86?
help you fix your problem unwind's explanation is the literal truth (one minor directional error notwithstanding), but doesn't explain why.%ebp is the "base pointer" for your stack frame. It's the pointer used by the C runtime to access local variabl
TAG : gcc
Date : January 02 2021, 06:48 AM , By : Ricardo
How do I edit error messages in GCC source
How do I edit error messages in GCC source
like below fixes the issue GCC is already localized. You don't need to edit any source, just edit (or create, if it doesn't exist) the proper po file. Getting it into the official distribution seems to require accepting the GNU license (not very surp
TAG : gcc
Date : January 02 2021, 06:48 AM , By : yossi
GCC cross compilation tool for fedora
GCC cross compilation tool for fedora
Hope that helps Arm provides prebuilt GNU cross-toolchains which is available from developer.arm.com. For A-profile cores - https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-a For R and M profile core
TAG : gcc
Date : December 31 2020, 04:56 AM , By : Raghaw
How to find a GCC version which contains a certain version of libstdc++.so?
How to find a GCC version which contains a certain version of libstdc++.so?
I wish this helpful for you See the this section of appendix B of the libstdc++ manual, which contains a list of gcc and libstdc++ version numbers.
TAG : gcc
Date : December 31 2020, 03:02 AM , By : Fenix Drakken
How get EIP from x86 inline assembly by gcc
How get EIP from x86 inline assembly by gcc
this one helps. This sounds unlikely to be useful (vs. just taking the address of the whole function like void *tmp = main), but it is possible.
TAG : gcc
Date : December 25 2020, 12:01 PM , By : user107506
Why can't we move directly 1 byte from stack's frame to register?
Why can't we move directly 1 byte from stack's frame to register?
should help you out TL:DR: You can, GCC just chooses not, saving 1 byte of code-size vs. a normal movzbl byte load and avoiding any partial-register penalties from a movb load+merge. But for obscure reasons, this won't cause a store-forwarding stall
TAG : gcc
Date : December 24 2020, 08:30 AM , By : dbarbot
Build gcc with adding debugging symbol to libgomp.so
Build gcc with adding debugging symbol to libgomp.so
fixed the issue. Will look into that further (I don't have enough reputation to leave a comment so I have to write it as an answer.)I'm not an expert on this topic but according to the docs of nm its meant for object files. libgomp.so is an elf file.
TAG : gcc
Date : December 24 2020, 06:30 AM , By : Johannes
Is it possible to output a string to the console in C without including the standard library?
Is it possible to output a string to the console in C without including the standard library?
Any of those help I recommend against using GCC's inline assembly. It is hard to get right. You ask the question Can I use NASM with GCC on windows?. The answer is YES, please do! You can link your 64-bit NASM code to a Win64 object and then link it
TAG : gcc
Date : December 23 2020, 05:30 AM , By : brennen
Fail to change CS register value from kernel mode. invalid opcode: 0000
Fail to change CS register value from kernel mode. invalid opcode: 0000
This might help you There is no mov instruction to write to cs. From Intel® 64 and IA-32 architectures software developer’s manual, MOV spec:
TAG : gcc
Date : December 06 2020, 11:22 PM , By : Wilfred Knigge
Gcc optimization question: unsigned mod vs if branch
Gcc optimization question: unsigned mod vs if branch
Hope that helps The optimization is not valid as the compiler cannot know from the code given that x is never>99 when the function is entered. If the function is entered with x=100, then at the exit of the function increment_IF with the if branch x=0
TAG : gcc
Date : November 27 2020, 04:01 AM , By : mlapida
What causes "x.asm:(.text+0xd): undefined reference to `y'"?
What causes "x.asm:(.text+0xd): undefined reference to `y'"?
seems to work fine There are a number of things wrong. I will assume given the error:
TAG : gcc
Date : November 26 2020, 06:28 AM , By : Lior
how to compile a single line in gcc using ubuntu terminal like we do in python?
how to compile a single line in gcc using ubuntu terminal like we do in python?
like below fixes the issue Not really like in Python but on Unix-like systems you can use here-documents to type text in the terminal and pipe it to gcc and run output a.out like that:
TAG : gcc
Date : November 24 2020, 04:01 AM , By : Steve Jones
The different between with GCC inline assembly and VC
The different between with GCC inline assembly and VC
I hope this helps . This is highly unlikely to work just from getting the syntax correct, because you're depending on values in registers being set to something before the asm statement, and you aren't using any input operands to make that happen. (A
TAG : gcc
Date : November 23 2020, 03:01 PM , By : ikey
If a function A is called only called by another function B, will GCC automatically puts that function A into funtion B
If a function A is called only called by another function B, will GCC automatically puts that function A into funtion B
it should still fix some issue GCC may inline the function based on the following rules:With -O1, if functionA is static and is only called once.
TAG : gcc
Date : November 22 2020, 11:00 PM , By : dormsbee
Bad value during floating point read in Fortran
Bad value during floating point read in Fortran
may help you . Format (F10.5) means 10 characters per input. But your file has 11 characters per number. So for the 5th number, it tries to get 9 -5.641 which it can't interpret.
TAG : gcc
Date : November 22 2020, 11:00 PM , By : Raghaw
Cannot find `lcrypto` or `lssl` when building with Cargo
Cannot find `lcrypto` or `lssl` when building with Cargo
seems to work fine You are using crates that depend on OpenSSL and on libcrypto. You must download, compile and install OpenSSL. Since you are using Windows, you should use MSYS or MSYS2 to build OpenSSL. MSYS2 has a package for OpenSSL, so it should
TAG : gcc
Date : November 22 2020, 03:03 PM , By : CSCI GOIN KILL ME
Compile code to raw binary
Compile code to raw binary
To fix the issue you can do I'm trying to compile my code into raw binary and as suggested by other SO posts (like this and this) I tried objdump: , You can pass -j .text to objcopy.
TAG : gcc
Date : November 21 2020, 07:31 AM , By : TheMoo
Installing eclim on osx 10.8.5 fails - no acceptable grep found
Installing eclim on osx 10.8.5 fails - no acceptable grep found
this one helps. I ended up fixing this by using macports to install gcc grep. Apparently OSX now uses bsd grep by default and there are differences between the two that gcc was choking on. The part of this that a little ridiculous is that I installed
TAG : gcc
Date : November 17 2020, 12:00 PM , By : Eric
Buildroot gcc headers don't match linux-headers
Buildroot gcc headers don't match linux-headers
will help you Enable UCLIBC_HAS_BSD_ERR in uClibc.You have a custom uClibc configuration. That falls squarely in the "you know what you are doing" category, since it allows you to remove features that other packages rely on.
TAG : gcc
Date : November 17 2020, 04:01 AM , By : Lunis Neko
gcc - A static library with undefined symbols?
gcc - A static library with undefined symbols?
seems to work fine Why does the static (.a) lib have dependencies on shared objects (e.g. libopenssl) that aren't statically compiled?
TAG : gcc
Date : November 10 2020, 09:01 AM , By : baumichel
Why is gcc not writing to memory correctly when I use __asm__
Why is gcc not writing to memory correctly when I use __asm__
will help you The optimizer can cause this sort of incorrect code when using __asm__ statements. You need to be very careful about your constraints. In this case, the compiler didn't "see" that I was accessing the memory through the pointer in esi, a
TAG : gcc
Date : November 07 2020, 11:01 PM , By : lhoBas
gcc/g++ not producing debug symbols for variables
gcc/g++ not producing debug symbols for variables
wish helps you nm normally does not show debugging symbols. You can try with the -a or --debug-syms options to get it to display them.For a better display of debugging symbols, you can try dwarfdump
TAG : gcc
Date : November 05 2020, 11:01 PM , By : Deepak Poondi
Translate VS inline assembler to GCC inline assembler
Translate VS inline assembler to GCC inline assembler
Hope this helps I find this C code with inline assembler code: , Try something like this:
TAG : gcc
Date : October 20 2020, 08:10 AM , By : Paul McKee
Getting INT 16h key scancode instead of character
Getting INT 16h key scancode instead of character
wish help you to fix your issue Int 0x16/AH=0 returns the scan code in the upper 16-bits of the returned value. inchar was actually defined as a 16-bit uint16_t type. All you need to do is shift the value of inchar to the right 8 bits to place the BI
TAG : gcc
Date : October 19 2020, 08:10 AM , By : Maplye
va_list has not been declared
va_list has not been declared
will help you I had the same error message and I solved including one of the next files
TAG : gcc
Date : October 18 2020, 11:12 PM , By : Patastroph
Using gcc with MinGW
Using gcc with MinGW
hop of those help? Add the install path to your %PATH% environment variable.to do this, you could do: SET PATH = %PATH%;C:\MinGw\bin\ when you start the command prompt.
TAG : gcc
Date : October 18 2020, 11:12 AM , By : user183345
How to overcome vc++ warning C4003 while writing common code for both gcc and vc++
How to overcome vc++ warning C4003 while writing common code for both gcc and vc++
Hope this helps I have a code that is compiled in both gcc and vc++. The code has a common macro which is called in two scenarios. , This might work depending on your VC++ version, etc
TAG : gcc
Date : October 17 2020, 11:12 PM , By : Habikki
Does MSP430 GCC support newer C++ standards? (like 11, 14, 17)
Does MSP430 GCC support newer C++ standards? (like 11, 14, 17)
Hope this helps There isn't much about this topic on the TI site, or, at least, I don't know enough C++ to give you a detailed and precise response.The implementation of the embedded ABI is described in this document that is mainly a derivation of th
TAG : gcc
Date : October 15 2020, 03:08 PM , By : Myatus
How to retrieve the GCC version used to compile a given ELF executable?
How to retrieve the GCC version used to compile a given ELF executable?
I hope this helps you . I'd like to retrieve the GCC version used to compile a given executable. I tried readelf but didn't get the information. Any thoughts? , It is normally stored in the comment section
TAG : gcc
Date : October 15 2020, 01:20 AM , By : Juan Pablo
Objdump disassemble doesn't match source code
Objdump disassemble doesn't match source code
help you fix your problem According the the objdump output, this function starts at ba00 and finishes at bbbd. How could it have so much code in a function that is empty?
TAG : gcc
Date : October 14 2020, 09:38 AM , By : ArdentRogue
SFINAE fails with template non-type reference argument
SFINAE fails with template non-type reference argument
will help you Consider this code: , Maybe instead of auto you want decltype(auto):
TAG : gcc
Date : October 08 2020, 12:00 PM , By : Per
Unresolved external function while linking Ocaml and C
Unresolved external function while linking Ocaml and C
Any of those help Generally you have to list modules in "topological" order. I.e., you need to list a module before the other modules that use it. I will test to see if this solves your problem.Update
TAG : gcc
Date : October 08 2020, 11:00 AM , By : Mariocki
Understanding GCC inline assembly code that uses memory source operands and x87 fcomi / fcmov
Understanding GCC inline assembly code that uses memory source operands and x87 fcomi / fcmov
this one helps. You probably want to replace this inline asm instead of even trying to fix and/or improve it. You mentioned something about "secure", so many non-data-dependent performance to avoid timing side channels? You might want to ensure branc
TAG : gcc
Date : October 07 2020, 06:00 PM , By : Willem van Schevikho
Different function call assemblywith -O0 and -O1 with GCC on ARM
Different function call assemblywith -O0 and -O1 with GCC on ARM
I wish did fix the issue. Don't bother analyzing machine codes compiled for the debug mode, because they follow some very obscured sequences that allows step by step execution by breakpoints while keeping all the global/local variables visible.It isn
TAG : gcc
Date : October 07 2020, 06:00 PM , By : adbanginwar
Generated assembly for extended alignment of stack variables
Generated assembly for extended alignment of stack variables
will help you I was digging into the assembly of code that was using extended alignment for a stack-based variable. This is a smaller version of the code , Nothing magical here. Line-by-line:
TAG : gcc
Date : October 06 2020, 06:00 PM , By : ikey
inline assembly code to read/write XMM & YMM registers?
inline assembly code to read/write XMM & YMM registers?
this will help The first step is to include , which includes all the definitions for the needed types as well as all the Intel Intrinsics for accessing all the MMX/SSE/AVX instructions. For most purposes, you want to use those intrinsics and not inli
TAG : gcc
Date : October 06 2020, 03:00 PM , By : kgw
gnatmake -o flag produces incorrect object file name
gnatmake -o flag produces incorrect object file name
hop of those help? For gnatmake, -o 'chooses an alternate executable name'. But even using gcc (or g++) on its own fails, at any rate on macOS, because gnat1: incorrect object file name.I found that you can compile to assembler and then compile that.
TAG : gcc
Date : October 06 2020, 07:00 AM , By : protagonist
Why is private move constructor allowed while initalizing via static method?
Why is private move constructor allowed while initalizing via static method?
I hope this helps . I believe this is a consequence of P0135: Wording for guaranteed copy elision through simplified value categories, specifically the change to [dcl.init]: If the initializer expression is a prvalue and the cv-unqualified version of
TAG : gcc
Date : October 06 2020, 03:00 AM , By : user152423
Change GCC's output for 0-set (clear) operation
Change GCC's output for 0-set (clear) operation
Any of those help You mean like sub eax,eax which is specially recognized as a zeroing idiom on only some CPUs, not all?The optimization is done as part of -fpeephole2, as part of -O2 or -Os; using -fno-peephole2 would give you mov eax,0 for material
TAG : gcc
Date : October 05 2020, 02:00 PM , By : GunnarHafdal
Why does GCC for Risc-V generate nop instructions after call
Why does GCC for Risc-V generate nop instructions after call
Hope that helps Not a complete answer, but at least an attempt at diving into the reason why the nop appears. I strongly believe it's a bug/leftover from architectures that have delay slots (as it gets added in the very first RTL pass - expand).Onto
TAG : gcc
Date : October 04 2020, 04:00 AM , By : jbcrail
Could someone please explain what this inline #define assembly is doing?
Could someone please explain what this inline #define assembly is doing?
should help you out The first two instructions add dst and src together, storing the result in the accumulator. The third instruction computes what's sometimes called the "end-around carry" and the fourth stores the result in dst.The following is an
TAG : gcc
Date : October 03 2020, 07:00 AM , By : Michael
Why does gcc generates strange code without flag -fno-pie?
Why does gcc generates strange code without flag -fno-pie?
Hope that helps You disassembled the object file without the --reloc flag, so the output is misleading. With the --reloc flag, you'll see this:
TAG : gcc
Date : October 03 2020, 07:00 AM , By : TheDave1022
ANTLR4 Grammar for parsing x86 Assembly
ANTLR4 Grammar for parsing x86 Assembly
will be helpful for those in need Reading that grammar, and looking and the AST generated, it's easy to see that a line like .p2align 4,,15 is matching the rule lbl for the token .p2align and that then 4,,15 doesn't match any assemblydirective or ins
TAG : gcc
Date : October 02 2020, 05:00 PM , By : qba73
Loading variable addresses into registers PowerPC inline Assembly
Loading variable addresses into registers PowerPC inline Assembly
fixed the issue. Will look into that further It's not clear what you are trying to do with the initial instructions:
TAG : gcc
Date : October 01 2020, 12:00 AM , By : user181445
What C instructions do I need to use to get gcc's x86-64 autovectorizer to output pshufb opcodes?
What C instructions do I need to use to get gcc's x86-64 autovectorizer to output pshufb opcodes?
To fix this issue I doubt that pshufb will be the most efficient solution, unless you intend to have the result in the lower part of an xmm register. If you do, provide an actual usage example.If you write something like:
TAG : gcc
Date : September 29 2020, 10:00 AM , By : user160048
What is linker, compiler, assembler and elaborator in an IDE like CodeBlocks?
What is linker, compiler, assembler and elaborator in an IDE like CodeBlocks?
This might help you A compiler and an assembler take as input source code and produce object code files in machine language (the binary form of the CPU instructions). The main difference is that a compiler takes source code written in a high level la
TAG : gcc
Date : September 28 2020, 02:00 PM , By : adrianmooreuk
gcc assembler - create only the minimal instructions necessary
gcc assembler - create only the minimal instructions necessary
hope this fix your issue GCC automatically links the C / C++ runtime start-up crt0.o and the standard library. You can provide your own startup code to override the default and provide command line options to force it not to link no the standard libr
TAG : gcc
Date : September 28 2020, 10:00 AM , By : Tamizhvendan
How to pass arguments to inline GCC/Clang asembly with Intel syntax?
How to pass arguments to inline GCC/Clang asembly with Intel syntax?
wish help you to fix your issue As a rule of thumb, gcc inline assembly must be written in ATT syntax to compile normally. You can compile with -masm=intel to use Intel syntax, but then your code won't compile without this flag. It is possible to pro
TAG : gcc
Date : September 26 2020, 07:00 PM , By : Debashree
How to interact with RISC-V CSRs by using GCC C code?
How to interact with RISC-V CSRs by using GCC C code?
this will help this is my first question to be asked here on stackoverflow, so please be kind with me ;) , You can use the I constraint for an immediate constant argument:
TAG : gcc
Date : September 26 2020, 11:00 AM , By : Val
Why does this MakeFile rule have two colons?
Why does this MakeFile rule have two colons?
Any of those help This is a static pattern rule. See the linked GNU make documentation.
TAG : gcc
Date : September 25 2020, 09:00 PM , By : tlync
How to use 32-bit w registers in ARM aarch64 GCC inline assembly?
How to use 32-bit w registers in ARM aarch64 GCC inline assembly?
To fix the issue you can do I can use 64-bit registers for example as in: , It can be done by adding the w in front of the %, e.g.:
TAG : gcc
Date : September 22 2020, 02:00 AM , By : PsyberMonkey
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