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Makefile No such file or directory


Makefile No such file or directory

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Makefile No such file or directory
Tag : c , By : Paul McKee
Date : January 11 2021, 03:32 PM

this one helps. I'm trying to do some simple linked list practices to familiarize myself with C. I currently have the following makefile. , You need to compile the .c file, not .h; and get rid of -o app.
linked_list.o: linked_list.c linked_list.h
    $(CC) $(CFLAGS) -c linked_list.c
node.o: node.c node.h
    $(CC) $(CFLAGS) -c node.c

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Makefile with Dynamic Output Directory Based on Source File Directory


Tag : makefile , By : user180941
Date : March 29 2020, 07:55 AM
like below fixes the issue I'm trying to create a Makefile using a monorepo and am struggling a bit with dynamic output directories based on the source files' directories. , Something like this should do the job:
# Directories
PKGS_ROOT := packages
PKGS_SRCDIR := src
PKGS_OUTDIR := lib

# Expands to the source directory for the specified package
pkg-srcdir = $(PKGS_ROOT)/$1/$(PKGS_SRCDIR)
# Expands to the output directory for the specified package
pkg-libdir = $(PKGS_ROOT)/$1/$(PKGS_OUTDIR)
# Expands to all output targets for the specified package
pkg-libs = $(addprefix $(call pkg-libdir,$1)/,$(notdir $(wildcard $(call pkg-srcdir,$1)/*.js)))

# Defines the following rules for the specified package:
#  - build rule for .js files
#  - rule to create the output directory if missing
#  - package rule to build all outputs
#  - clean-package rule to remove the output directory
# Adds the following prerequisites:
#  - package target to 'all' rule
#  - clean-package target to 'clean' rule
define pkg-rules
$(call pkg-libdir,$1)/%.js: $(call pkg-srcdir,$1)/%.js | $(call pkg-libdir,$1)
    @echo Making $$@ from $$^
    @cp $$^ $$@
$(call pkg-libdir,$1):
    @mkdir $$@
$1: $(call pkg-libs,$1)
clean-$1:
    rm -rf $(call pkg-libdir,$1)
all: $1
clean: clean-$1
.PHONY: $1 clean-$1
endef

# Creates rules for the specified package
add-pkg = $(eval $(call pkg-rules,$1))

# Create rules for all packages
PKGS := $(notdir $(wildcard $(PKGS_ROOT)/*))
$(foreach p,$(PKGS),$(call add-pkg,$p))

# Will be filled in by pkg-rules
.PHONY: all clean

.DEFAULT_GOAL := all

makefile fatal error: no such file or directory, but the file is in current directory


Tag : c , By : MikeG
Date : March 29 2020, 07:55 AM
help you fix your problem Your makefile looks fine. The basic structure of a makefile contains this pattern:
<build object> : <list of dependencies>
       command to execute to build the object if dependencies have changed
           ...
       command to execute to build the object if dependencies have changed
#include <lib.c>
#include "lib.h"

Makefile from one source Directory trying to access a cpp file from other Directory


Tag : cpp , By : beebob
Date : March 29 2020, 07:55 AM
around this issue Adding vpath %.cpp ../hello along with @gaoithe's solution has solved this issue.
vpath %.cpp ../hello
GCC=g++
CPPFLAGS=-c -Wall
LDFLAGS=
OBJDIR=objdir
OBJ=$(addprefix $(OBJDIR)/, $(patsubst %.cpp, %.o, $(wildcard *.cpp)))
OBJ+=$(addprefix $(OBJDIR)/, $(patsubst %.cpp, %.o, $(notdir $(wildcard ../hello/*.cpp))))
TARGET=HelloWorld

.PHONY: all clean

all: $(OBJDIR) $(TARGET)

$(OBJDIR):
    mkdir $(OBJDIR)

$(OBJDIR)/%.o: %.cpp
    $(GCC) $(CPPFLAGS) -c $< -o $@
$(TARGET): $(OBJ)
    $(GCC) $(LDFLAGS) -o $@ $^
clean:
    @rm -f $(TARGET) $(wildcard *.o)
    @rm -rf $(OBJDIR)
$ ls objdir/
 Hello.o  main.o   World.o  

Update file (overwrite) file if file in other directory has changed. Simple Makefile


Tag : makefile , By : usingtechnology
Date : March 29 2020, 07:55 AM
hope this fix your issue I have a file dir/a.txt which is updated occasionally. When I run make I need to update a file in the current directory a.txt such that it is overwritten with dir/a.txt if the latter has changed. I tried this , You do it like this:
.PHONY: all

all: a.txt

a.txt: dir/a.txt
    cp $< $@
cp dir/a.txt a.txt
.PHONY: all

Why is the makefile returning g++: error: h file or directory make: *** [Makefile:12: test] Error 1?


Tag : cpp , By : user157654
Date : March 29 2020, 07:55 AM
To fix this issue The problem is that $^ and $@ is not working as you expected. $@ and $^ return the left and right values of $OBJ. However $OBJ simply resolves to "test.o".
OBJ = $(SRC:.cpp=.o) # converts test.cpp to test.o
CXX = g++
CXXFLAGS = -c -Wall -Wextra -Werror
LDFLAGS =  -lgmp -lsodium -lssl -lcrypto -lgmpxx
SRC = $(wildcard *.cpp )
HDR = $(wildcard *.h )
OBJ = $(SRC) $(SRC :.cpp =.o )
all : Release
Debug : CXXFLAGS +=-g
Debug : test
Release : test
test : $(OBJ)
    $(CXX) -o $@ $^ $(LDFLAGS)
%.o : %.cpp $(HDR)
    $(CXX) $(CXXFLAGS) $< -o $@
clean :
    rm -f $(OBJ) test
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